Rajeev Chandrasekhar to Inaugurate Synopsys’ Chip Design Centre Today

Rajeev-Chandrashekhar
Rajeev Chandrasekhar, Union Minister of State for Electronics and IT, Skill Development and Entrepreneurship, and Jal Shakti (Image Credits: Rajeev Chandrasekhar/LinkedIn)

Union Minister of State for Electronics and IT, Skill Development and Entrepreneurship, and Jal Shakti, Rajeev Chandrasekhar, is all set to inaugurate the Chip Design Centre by Synopsys‘ at DLF Tech Park in Noida today. This event will see the Minister delivering a special address to an audience comprising senior leadership, employees, partners, and customer delegates of Synopsys.

Synopsys, established in 1986, gained recognition for commercializing logic synthesis, revolutionizing the creation of digital designs from language descriptions. This capability played a pivotal role in the transition of Computer-Aided Design (CAD) into the Electronic Design Automation (EDA) era, facilitating the scaling of digital complexity in accordance with Moore’s Law.

Synopsys has consistently expanded its product portfolio and market position through investments in research and development, coupled with approximately 120 strategic acquisitions. Today, Synopsys stands as a leading name in EDA, playing a crucial role in advancing digital chips within the technology ecosystem.

With a diverse range of design portfolios spanning from silicon to software, Synopsys contributes to a $5.9 billion in revenue. As a market leader in EDA tools and Interface, Foundation, & Physical IPs, Synopsys holds a significant position in the industry. Demonstrating confidence in Indian design talent, Synopsys has established the second-largest design center in India, surpassing its headquarters.

This center is home to approximately 6,000 engineers from India, constituting an impressive 27% of their global design workforce.

Acknowledging the fact that 20% of global VLSI/Chip designers are from India, Synopsys’ expanding footprint in Noida is a testament to the burgeoning ecosystem of fabless chip design and innovation in the country.

Synopsys’ Indian engineers are not only contributing to every aspect of the design cycle of semiconductor chips/IP Cores but are also actively participating in the success stories of leading semiconductor companies. Nearly all the chips designed by any company utilize EDA/IP solutions in one way or another.

The nation is making strides to fulfill the vision set by Prime Minister Modi, emphasizing that “Design in India is as crucial as Make in India.” Rajeev Chandrasekhar is spearheading various initiatives to bring this vision to fruition, including SemiconIndia futureDESIGN, Digital India RISC-V (DIR-V) Program, and the India Semiconductor Research Center (ISRC).

Rajeev Chandrasekhar’s involvement in inaugurating Synopsys’ Chip Design Centre reflects the the government’s focus in fostering technological innovation and design capabilities within the country. This event not only marks a significant milestone for Synopsys but also highlights India’s growing influence in the global semiconductor industry.

The inauguration of the Chip Design Centre aligns seamlessly with the government’s vision for a self-reliant and technologically advanced India, paving the way for continued advancements in the realm of chip design and electronic manufacturing.